1. Field of the Invention
The present invention relates to a method of crystallizing silicon. More particularly, the present invention relates to a sequential lateral solidification device and a method of crystallizing silicon using the same. More particularly still, the present invention relates to controlling an overlapping of irradiation areas while crystallizing amorphous silicon to prevent a linear-type image deficiency caused by a defect within a thin film transistor within a circuit area or a pixel area.
2. Discussion of the Related Art
As information technologies continue to evolve, the demand for various types of displays increases. Accordingly, flat panel display (FPD) devices such as liquid crystal display devices (LCDs), plasma display panels (PDPs), electroluminescent displays (ELDs), and vacuum fluorescent displays (VFDs), have been the subject of recent research. Owing to their light weight, compact construction, low power consumption, and superior ability to display high resolution images, colors, and moving images over a wide range of viewing angles, LCD devices are widely used as substitutes for cathode ray tubes (CRTs) of televisions, and as monitors for notebook and desktop computers.
Generally, an LCD device includes an LCD panel for displaying images and a driving unit for applying driving signals to the LCD panel. The LCD panel typically includes a first substrate bonded to a second substrate and liquid crystal layer material injected between the first and second substrates.
Accordingly, the first glass substrate (i.e., a TFT array substrate) supports a plurality of gate lines regularly spaced apart from each other and extending along a first direction; a plurality of data lines regularly spaced apart from each other and extending along a second direction perpendicular to the first direction so as to cross the plurality of gate lines; a plurality of pixel electrodes formed in a matrix of pixel areas defined by crossings of the plurality of gate and data lines; and a plurality of thin film transistors (TFTs) formed in the pixel areas and connected to the plurality of gate lines for switching signals transmitted by the data lines to the pixel electrodes.
The second glass substrate (i.e., a color filter substrate) supports a black matrix layer for preventing the transmission of light outside the pixel areas; an R/G/B color filter layer for selectively transmitting predetermined wavelengths of light; and a common electrode. Alternatively, the common electrode can be formed on the first substrate to form a horizontal electric field-type LCD.
The first and second substrates described above are uniformly separated from each other by spacers and are bonded to each other via a sealant material, in which a liquid crystal injection inlet is defined. The space between the bonded first and second substrates is often referred to as a cell gap. Liquid crystal material is injected between the bonded first and second substrates by creating a vacuum within the cell gap, dipping the liquid crystal injection inlet into a vessel containing liquid crystal material, and allowing the liquid crystal material to be injected into the cell gap. After the cell gap is filled with liquid crystal material, the liquid crystal injection inlet is sealed with an air-tight sealant.
Molecules of liquid crystal material are thin and long and can be aligned to have a specific orientation. Therefore, LCD devices operate at least in part, by manipulating anisotropic optical and polarization characteristics of liquid crystal material. Specifically, the orientation of the liquid crystal molecules can be controlled in the presence of applied electric fields. Accordingly, by controlling the application of electric fields, the orientation of liquid crystal molecules is selectively manipulated to selectively refract light along the orientation direction of the liquid crystal molecules, resulting in the generation of an image.
LCDs of the type described above are known as active matrix-type LCDs and are suitable for displaying high resolution images and moving images. TFTs of such LCD devices are often formed using polycrystalline silicon as their semiconductor layer because polycrystalline silicon is a material with a high electric field mobility and low photocurrent. Polycrystalline silicon TFTs can be fabricated using a low temperature fabrication process or a high temperature fabrication process, depending upon the temperature at which the polycrystalline silicon is formed.
The high temperature fabrication process is often carried out at temperatures of about 1000° C. Exposed to such temperatures, however, most glass substrates, on which the TFTs are formed, become deleteriously modified because they have poor heat-resistance. To overcome this problem, expensive quartz substrates having excellent heat-resistance must be used. Further, the high temperature fabrication process may form an inadequately crystallized polycrystalline silicon layer having a high surface roughness and fine crystal grains. TFTs formed of high temperature polycrystalline silicon generally have poor device characteristics as compared to TFTs including polycrystalline silicon formed according to the low temperature fabrication process. Moreover, the low temperature fabrication process generally causes less damage to the underlying substrate than the high temperature fabrication process.
In forming polycrystalline silicon according to the low temperature fabrication process, a layer of amorphous silicon is vapor-deposited onto a substrate at a low temperature and subsequently crystallized to form polycrystalline silicon using either a laser annealing process or a metal induced crystallization process. According to the laser annealing process, a pulsed laser beam is irradiated about every 10 to 100 nanoseconds onto an amorphous silicon layer deposited on a substrate to repeatedly melt and re-solidify the deposited amorphous silicon layer. A related art laser annealing method will now be discussed in greater detail.
FIG. 1 illustrates a relationship between grain sizes of polycrystalline silicon and laser energy intensity irradiated onto amorphous silicon.
Referring to FIG. 1, grain sizes of polycrystalline formed by melting and re-solidifying amorphous silicon vary depending upon the intensity of laser energy irradiated onto the amorphous silicon. Intensities of the irradiated laser energy can be grouped into a first, second, and third regions.
The first region represents a range of laser energy intensities which melt only the surface of the amorphous silicon layer. After being irradiated with laser energy having an intensity within the first region, the surface of the melted silicon layer solidifies to form small grains having a substantially uniform size.
The second region represents a range of laser energy intensities which melt almost an entirety of the amorphous silicon layer. After being irradiated with laser energy having an intensity within the second region, the melted amorphous silicon layer solidifies and polycrystalline silicon is formed in what is known as a heterogeneous nucleation process, whereby unmelted particles of the amorphous silicon layer act as nucleation sites for the growth of new silicon crystals. Therefore, polycrystalline silicon formed by exposing amorphous silicon to laser energy densities in the second region is characterized as having larger grains than polycrystalline silicon formed by exposing amorphous silicon to laser energy densities in the first region. As shown in FIG. 1, however, the second region is narrower than the first region. Further, the polycrystalline silicon grain sizes associated with the second region are not as uniform as polycrystalline silicon grain sizes associated with the first region.
The third region represents a range of laser energy intensities which completely melt the amorphous silicon layer. After being irradiated with laser energy having an intensity within the third region, the melted amorphous silicon layer solidifies and polycrystalline silicon is formed in what is known as a homogeneous nucleation process to produce small grains having uniform size.
While polycrystalline silicon having large, rough silicon grains of a uniform size can be formed by controlling the number of laser beam pulses of the aforementioned second intensity region irradiated onto the amorphous silicon layer and by controlling the amount of overlap between irradiated areas, the area of grain boundaries in the polycrystalline produced is also very large. The large area of grain boundaries thus impede efficient flow of electric current, thereby decreasing the reliability of the TFT. Additionally, collisions between electrons may occur within the plurality of crystal grains to deteriorate a subsequently formed insulating layer, thereby further degrading the TFT.
To resolve problems of the above-described laser annealing method, a sequential lateral solidification (SLS) method has been provided. The SLS method leverages the natural tendency of silicon grains to grow along a direction perpendicular to a phase boundary between of a liquid phase region and a solid phase region. Accordingly, the lateral growth of silicon grains may be controlled by adjusting an energy intensity, an irradiation range, and motion of a laser beam. (Robert S. Sposilli, M. A. Crowder, and James S. Im, Mat. Res. Soc. Symp. Proc. Vol. 452, 956˜057, 1997) By controlling growth of the silicon grains according to the SLS method, the area of the grain boundaries may be minimized, thereby minimizing the generation of leakage current.
In performing the related art SLS method, a substrate supporting an amorphous silicon layer is mounted onto a moveable stage. An irradiation device is then used to selectively irradiate a first narrow region of the amorphous silicon layer, thereby preventing an entirety of the amorphous silicon material from melting and crystallizing in a single irradiation. After irradiating the first narrow region, the substrate is moved and a second narrow region of the amorphous silicon layer is selectively irradiated. The process of selectively irradiating narrow regions of the amorphous silicon layer is repeated until the entire surface of the amorphous silicon layer has been irradiated. By controlling the laser energy intensity, irradiation range of the laser beam, and translation distance, the SLS method can be used to laterally grow silicon crystals to a predetermined length.
FIG. 2 illustrates a related art sequential lateral solidification (SLS) device.
Referring to FIG. 2, the related art sequential lateral solidification (SLS) device includes a laser beam generator 1 that generates laser beam pulses, a focusing lens 2 that focuses the laser beam pulses, a mask 3 that exposes portions of a substrate 10 to the laser beam pulses, and a reduction lens 4 arranged below the mask 3 that reduces the laser beam pulses transmitted through the mask 3 to a constant rate.
Generally, the laser beam generator 1 includes an XeCl or KrF laser source that produces light having a wavelength of about 308 or 248 nanometers (nm), respectively. The light produced by the laser beam generator is discharged as an untreated laser beam. The energy level of the untreated laser beam is controlled upon passing through an attenuator (not shown) and is subsequently transmitted through the focusing lens 2.
The substrate 10 supports an amorphous silicon layer and is fixed to an X-Y stage 5 below the mask 3.
The X-Y stage 5 can be shifted in incremental steps to gradually expose an entirety of the substrate 10 to the laser beam and crystallize an entirety of the amorphous silicon layer.
The mask 3 includes a transparent region ‘A,’ through which the laser beam may be transmitted, and an opaque region ‘B,’ preventing transmission of the laser beam. The width of the transparent region ‘A’ determines a lateral growth length of silicon crystal grains formed upon solidification of the melted portions of the amorphous silicon layer.
A related art method of crystallizing amorphous silicon using the related art SLS device of FIG. 2 will now be described in greater detail with reference to FIG. 3.
Referring to FIG. 3, a buffer layer 21 is formed on the substrate 10 and an amorphous silicon layer 22 is formed on the buffer layer 21. A chemical vapor deposition (CVD) method is generally used to form the amorphous silicon layer 22 over the buffer layer 21 and, therefore, the amorphous silicon layer 22 usually includes a high hydrogen content. Once formed, the amorphous silicon layer 22 must be dehydrogenated in a heat treatment to prevent subsequently formed polycrystalline silicon material from becoming too rough, thereby resulting in poor electrical characteristics of the TFT. After the dehydrogenation heat treatment, the mask 3 shown in FIG. 2 is arranged over the substrate 10 and portions of the amorphous silicon layer 22 exposed by the transparent regions ‘A’ are irradiated with laser beam pulses. The intensity of the laser beam pulses irradiated to the amorphous silicon layer 22 has a value within the third region shown in FIG. 1. Accordingly, the intensity of the irradiated laser beam pulse is sufficient to melt an entirety of the exposed portion of the amorphous silicon layer 22.
FIG. 4 illustrates crystallized areas of the amorphous silicon layer 22 shown in FIG. 3 after a first irradiation of the related art SLS method.
Referring to FIG. 4, portions of the amorphous silicon layer 22 exposed to the irradiated laser beam pulses via transparent regions ‘A’ of mask 3 become melted. Therefore, upon the irradiation, the exposed portions of the amorphous silicon layer 22 are placed in a liquid phase while portions of the amorphous silicon layer 22 protected by opaque regions ‘B’ of mask 3 (i.e., the unexposed portions of the amorphous silicon layer 22) remain in a solid phase. After the laser beam irradiation, silicon crystal grains 33 grow laterally, perpendicularly from an interface 32 of the exposed and unexposed portions of the amorphous silicon layer 22, towards a mid-point 31 of the exposed portions of the amorphous silicon layer 22. Growth of each silicon crystal grain 33 stops when one silicon crystal grain 33 contacts another silicon crystal grain 33, growing from opposite interfaces 32. It should be noted that FIG. 4 merely illustrates results of a first irradiation of the SLS method. Accordingly, the number of crystallized regions within the amorphous silicon layer 22 in a single irradiation step equals the number of transparent regions ‘A’ of mask 3.
As is evident, the width of the laser beam and the size of the mask 3 are fixed and, therefore, the SLS method prevents the entire amorphous silicon layer 22 from being crystallized in a single irradiation step. Moreover, as the size of the substrate 10 increases, the number of times mask 3 must be moved increases to enable repeated laser beam irradiations and crystallization of the entire amorphous silicon layer. To completely crystallize the amorphous silicon layer 22, the stage 5 must be incrementally moved a plurality of times to expose previously unexposed regions of the amorphous silicon layer 22 to laser beam pulses transmitted through the transparent regions ‘A’ of mask 3 in subsequent irradiation steps. Thus, regions of the amorphous silicon layer 22 that are adjacent to previously exposed regions can eventually be crystallized. Generally, the growth length of each silicon crystal grain 33 is 1.5 to 2 micrometers (μm). As will be discussed in greater detail below, the process of incrementally moving the mask 3 to form contiguous crystallized regions forms a plurality of ‘crystallization blocks’ within the crystallized silicon material. Accordingly, the size of each ‘crystallization block’ within crystallized silicon material is proportional to horizontal and vertical dimensions of the mask 3 used to incrementally expose the amorphous silicon layer 22. Specifically, however, the size of each crystallization block is associated with a reduction rate of the reduction lens 2.
Use of the mask 3 described with reference to FIGS. 2-4, is disadvantageous because the width of each transparent region ‘A’ is less than the width of each opaque region ‘B’ therebetween. Accordingly, the stage 5 must move a plurality of times in order to form a single crystallization block. Therefore, the time required to move the mask 3 or stage 5 consumes an unacceptably large portion of total time required to crystallize the entire amorphous silicon layer 22 and reduces the yield of the SLS method. To overcome the above-described problem, a related art mask 40 having transparent and opaque regions of substantially equal widths has been proposed and will now be described in detail with respect to FIG. 5.
Referring to FIG. 5, mask 40 includes transparent regions ‘A’ and opaque regions ‘B’ alternately arranged along a vertical direction. Respective widths ‘a’ and ‘b’ of the transparent and opaque regions ‘A’ and ‘B’ are adjustable but are substantially equal. In performing the SLS method described above, portions of an amorphous silicon layer not exposed by mask 40 (i.e., unexposed portions of the amorphous silicon layer) during a first irradiation are exposed during a second irradiation. Accordingly, a crystallization block may be formed in only two irradiation procedures using a 1-pulse laser beam via mask 40. Using mask 40, the crystallization block may be formed in only two irradiation procedures by moving the stage 5 along a vertical direction in an amount equal to half the added length of the width ‘a’ of the transparent region ‘A’ and the width ‘b’ of the opaque region ‘B’ (i.e., (a+b)/2).
FIGS. 6A and 6B illustrate arrangements of crystallized regions of the amorphous silicon layer after being exposed to first and second irradiations via mask 40.
Referring to FIG. 6A, upon performing a first irradiation, laser beam pulses are irradiated onto portions of an amorphous silicon layer exposed by transparent regions ‘A’ of mask 40. Accordingly, first irradiated regions Ia of the amorphous silicon layer are completely melted and, subsequently, crystallized. Upon crystallization, grain growth occurs laterally from the liquid phase/solid phase interface and proceeds perpendicularly from the liquid phase/solid phase interface toward a mid-point of each first irradiated region Ia.
Referring to FIG. 6B, after performing the first irradiation, the substrate is incrementally moved so that the transparent regions ‘A’ of mask 40 expose previously unexposed portions of the amorphous silicon layer and a second irradiation is performed. Accordingly, second irradiated regions 1b of the amorphous silicon layer are completely melted and, subsequently, crystallized. Upon crystallization, silicon grains resultant from the first irradiation act as nucleation sites for new grains to grow perpendicularly from the liquid phase/solid phase interface toward a mid-point of each second irradiated region 1b. Accordingly, the lateral growth length of the grains formed after the second irradiation is twice the lateral growth length of grains formed after the first irradiation.
FIG. 7 illustrates the application of a related art SLS method using the mask 40. FIG. 8 illustrates a plan view of a portions of the amorphous silicon layer crystallized upon performing the SLS method shown in FIG. 7.
Referring to FIG. 7, mask 40 is arranged over an predetermined area (i.e., upper-right corner) of substrate 60 having amorphous silicon deposited thereon. After a first irradiation process, portions of the substrate 60 exposed by the mask 40 are shifted along a −X-axis direction (Movement {circle around (1)}) by an amount equal to length ‘L’ of the transparent region ‘A’ and a second irradiation process is performed. The incremental shifting and irradiating steps are repeated along the −X-axis direction across the horizontal length of substrate 60. Subsequently, portions of the substrate 60 exposed by mask 40 are shifted along the −Y-axis direction (Movement {circle around (2)}) by an amount equal to half the added length of the widths ‘a’ and ‘b’ of the transparent and opaque regions ‘A’ and ‘B’ (i.e., (a+b)/2) and another irradiation process is performed to form a crystallization block. Next, portions of the substrate 60 exposed by mask 40 are shifted along the +X-axis direction (Movement {circle around (3)}) by an amount equal to length ‘L’ of the transparent region ‘A’ and another irradiation process is performed to form another crystallization block. The incremental shifting and irradiating steps are repeated along the +X-axis direction across the horizontal length of substrate 60 to crystallize portions of the amorphous silicon layer not previously exposed during Movement {circle around (1)}, thereby forming crystallization blocks (e.g., C2 and C1). Subsequently, portions of the substrate 60 exposed by mask 40 are shifted along the −Y-axis direction (Movement {circle around (4)}) by an amount equal to vertical length ‘S’ of the mask 40 and another irradiation process is performed. Accordingly, the Movements ({circle around (1)}, {circle around (2)}, {circle around (3)}, and {circle around (4)} are repeated as necessary to crystallize an entirety of the amorphous silicon layer.
Generally, the aforementioned SLS method is performed by fixing the mask 40 and moving only the substrate 60. Accordingly, portions of the substrate 60 exposed by mask 40 are incrementally shifted by moving the substrate 60 along a direction opposite the direction indicated by the arrows accompanying Movements {circle around (1)}, {circle around (2)}, {circle around (3)}, and {circle around (4)}. Specifically, while portions of the substrate 60 exposed during Movement {circle around (1)} are shifted in the −X-axis direction, the substrate 60 is actually moved along the +X-axis direction in an amount equal to length ‘L’ of the transparent region ‘A’. Similarly, while portions of the substrate 60 exposed during Movement {circle around (2)} are shifted in the −Y-axis direction, the substrate 60 is actually moved along the +Y-axis direction in an amount equal to (a+b)/2. Further, while portions of the substrate 60 exposed during Movement {circle around (3)}, the substrate 60 is actually moved along the −X-axis in an amount equal to length ‘L’ of the transparent region ‘A’. Lastly, while portions of the substrate 60 exposed during Movement {circle around (4)} are shifted in the −Y-axis direction, the substrate 60 is actually moved along the +Y-axis direction in an amount equal to length ‘S’ of mask 40. Additionally, after each Movement the region of the amorphous silicon layer exposed by the mask 40 is irradiated and crystallized (initially irradiated areas of the substrate 60, after the substrate 60 is moved along a specific direction are shown as hatched).
Referring to FIG. 8, upon performing the SLS method as described above with respect to FIG. 7, a plurality of regions of the amorphous silicon layer supported by substrate 60 are exposed to irradiated laser beam pulses at least twice. Such regions will hereinafter be referred to as ‘overlapping areas’. Specifically, a first overlapping area 01 is formed when incrementally shifting the substrate 60 along the X-axis by the amount equal to ‘L’. Similarly, a plurality of second overlapping areas 02 are formed when incrementally shifting the substrate 60 along the Y-axis by the amount equal to (a+b)/2. Accordingly, overlapping areas of crystallization are formed within each crystallization block and between adjacent crystallization blocks. First and second twice-irradiated areas 51 and 52, respectively, are formed within the first and second overlapping areas 01 and 02, respectively, and quadruply-irradiated area 53 arranged at crossings of the first and second overlapping areas 01 and 02.
Due to the numerous times the silicon material within the first and second overlapping areas 01 and 02 is irradiated, ruptures undesirably occur within the crystallized silicon grains in the twice- and quadrudply-irradiated areas 51-53. Moreover, when devices are formed using silicon material occupying the overlapping areas, the electron mobility of those devices becomes undesirably deficient.
FIG. 9 illustrates a plan view of an arrangement of crystallization blocks formed in accordance with the related art SLS method and a layout of devices formed from silicon crystallized in the related art SLS method.
Referring to FIG. 9, and as described above, the related art SLS method forms a layer of polycrystalline silicon including a plurality of crystallization blocks C1, C2, . . . , CM, CN, etc., wherein each crystallization block contains overlapping irradiated areas and wherein adjacent crystallization blocks overlap each other. Subsequently, the layer of polycrystalline silicon is patterned during the formation of a plurality of devices (i.e., semiconductor layer of pixels or TFTs within pixel areas 71, and components of the gate and source drivers 61 and 62, respectively). Undesirably, at least a portion of these devices are formed using polycrystalline silicon material within these overlapping areas.
As mentioned above, portions of the crystallized silicon in the overlapping areas have poorer electrical characteristics than portions of the crystallized silicon outside the overlapping areas. Accordingly, devices formed using portions of the crystallized silicon in the overlapping areas have poorer electrical characteristics as compared to devices formed using portions of the crystallized silicon outside the overlapping areas. Accordingly, a picture quality of the pixel areas 71, as well as a those formed in non-overlapping areas, and so, linear deterioration may occur in a line quality of source or gate lines within the source or gate drivers 62 or 61, may become deteriorated.
As described above, use of the related art method SLS method of crystallizing amorphous silicon is disadvantageous because devices are formed using polycrystalline silicon material that has been irradiated multiple times. Because the crystallizing characteristic in the overlapping areas is not uniform, electrical characteristics of the silicon material within the overlapping areas are deficient and cause a systemic deterioration in devices (e.g., TFTs, gate driver, source driver, etc.) formed from the multiply-irradiated silicon material.